SC16IS741 - Single UART with I2C-bus/SPI interface

Description

Library for interfacing NXPs SC16IS741 Single UART with I2C-bus/SPI interface

  • SPI interface with communication speed up to 4 MHz
  • I2C interface with communication speed up to 400 kHz
  • 64 bytes FIFO (transmitter and receiver)

OVERVIEW

SC16IS741_Abstract:
This library can be used to handle NXP's SC16IS741 Single UART with I2C-bus/SPI interface.

Interfaces:
  • 1x SPI or 1x I2C (Currently not supported)
  • 1x GPIO for chip select (Only when using the SPI interface)
  • 1x GPIO for hardware reset
  • 1x IRQ for receive interrupt

  • The SC16IS741A1 is a slave I2C-bus/SPI interface to a single-channel high performance UART. It includes a 64 bytes FIFO buffer for receive and transmit direction and also offers RS485 support functions.
  • SPI interface with communication speed up to 4 MHz
  • I2C interface with communication speed up to 400 kHz
  • Single full-duplex UART
  • 64 bytes FIFO (transmitter and receiver)
  • Fully compatible with industrial standard 16C450 and equivalent
  • Baud rates up to 5 Mbit/s in 16x clock mode
  • Auto hardware or software flow control
  • RS485 support functions
  • Built-in IrDA encoder and decoder interface
  • Fully programmable character formatting

  • For more information, see the NXP website
    SC16IS741_How_to_use_SPI_mode:
    /* Hardware setup */ const { PORT_SPI = 0, // SPI interface that should be used PIN_RESET = 5, // GPIO pin that should be used for chip hardware reset PIN_CS0 = 2, // GPIO pin that should be used for the CS signal PIN_IRQ0 = 0, // Interrupt pin that should be used } /* Handles for available sensors */ new hRS485_0; // Handle to manage the SC16IS741 /** * Cyclic 1s timer for transmitting some sample data */ #callback Timer1s() { new written; // Variable to store the number of written bytes // Sample data for writing new data{} = "Hello World!\r\n"; new datalen = strnlen(data, sizeof(data)); // Number of bytes of the sample data // Transmit the sample data and issue the number of written bytes via console written = SC16IS741_Write(hRS485_0, data, datalen); #log("CH%d written %d Bytes", hRS485_0, written); } /** * Receiver callback function * * Received channel, data, length and status information is passed * to this function and issued via console. */ SC16IS741_Receive_Callback(handle, data{}, len, status) { #log("CH%d received len: %d, data: %s, status: 0x%02X", handle, len, data, status); } /** * Function that is called when the device has been prepared for the start of the application by the * "salve" function. I.e. the device is ready for proceeding with the application. */ #callback AppInit() { // Inits the SPI interface catch(rM2M_SpiInit(PORT_SPI, SC16IS741_SPICLK, SC16IS741_SPIMODE)); // Initializes communication with the SC16IS741 and prepares it for use catch(SC16IS741_Init(hRS485_0, PIN_CS0, PIN_IRQ0, PIN_RESET, PORT_SPI)); // Activates the SC16IS741 in Auto RS-485 RTS control mode catch(SC16IS741_Open_RS485_Mode(hRS485_0, 57600, SC16IS741_MODE_8_DATABIT|SC16IS741_MODE_1_STOPBIT|SC16IS741_MODE_NO_PARITY)); // Creates a 1s cyclic timer setInterval(Timer1s, 1000); } /* Application entry point */ main() { // Prepare device for the application start salve(AppInit); }
    SC16IS741_How_to_use_I2C_mode:
    Not implemented yet.

    BASIC

    SC16IS741_SPICLK -

    typical SPI clock speed to be used

    SC16IS741_SPIMODE -

    configuration of clock polarity and clock phase for the SC16IS741

    SC16IS741_I2C_CLOCK -

    typical I2C clock speed to be used (400kHz, I2C Fast-Mode)

    SC16IS741_I2C_ADRx:

    Available I2C addresses

    The corresponding I2C address must be used if the condition applies:
    SC16IS741_I2C_ADR0 - A0 = GND, A1 = GND
    SC16IS741_I2C_ADR1 - A0 = GND, A1 = VS
    SC16IS741_I2C_ADR2 - A0 = GND, A1 = SCL
    SC16IS741_I2C_ADR3 - A0 = GND, A1 = SDA
    SC16IS741_I2C_ADR4 - A0 = VS, A1 = GND
    SC16IS741_I2C_ADR5 - A0 = VS, A1 = VS
    SC16IS741_I2C_ADR6 - A0 = VS, A1 = SCL
    SC16IS741_I2C_ADR7 - A0 = VS, A1 = SDA
    SC16IS741_I2C_ADR8 - A0 = SCL, A1 = GND
    SC16IS741_I2C_ADR9 - A0 = SCL, A1 = VS
    SC16IS741_I2C_ADR10 - A0 = SCL, A1 = SCL
    SC16IS741_I2C_ADR11 - A0 = SCL, A1 = SDA
    SC16IS741_I2C_ADR12 - A0 = SDA, A1 = GND
    SC16IS741_I2C_ADR13 - A0 = SDA, A1 = VS
    SC16IS741_I2C_ADR14 - A0 = SDA, A1 = SCL
    SC16IS741_I2C_ADR15 - A0 = SDA, A1 = SDA
    SC16IS741_MODE_xxx:

    SC16IS741 UART Configuration Bits (Bitmask)

    Bit3-4: Parity
    SC16IS741_MODE_PARITY_NONE - (0x00): no parity
    SC16IS741_MODE_PARITY_EVEN - (0x18): even parity
    SC16IS741_MODE_PARITY_ODD - (0x08): odd parity
    Bit2: Number of stop bits
    SC16IS741_MODE_1_STOPBIT - (0x00):1 stop bit
    SC16IS741_MODE_2_STOPBIT - (0x04):2 stop bits
    Bit0-1: Number of data bits
    SC16IS741_MODE_5_DATABIT - (0x00): 5 data bits
    SC16IS741_MODE_6_DATABIT - (0x01): 6 data bits
    SC16IS741_MODE_7_DATABIT - (0x02): 7 data bits
    SC16IS741_MODE_8_DATABIT - (0x03): 8 data bits
    SC16IS741_Init(&handle, cs=-1, int=-1, reset=-1, port=0, addr=-1)

    Initializes communication with the SC16IS741 and prepares it for use


    In SPI mode (cs >= 0, addr =-1) first of all the used CS pin is configured as an output and set to high so no data transfer takes place at the beginning. If the optional RESET pin is specified, a hardware reset sequence is performed. Communication with the SC16IS741 is verified by reading the contents of the SC16IS741_REG_LCR register, which after reset must match a default value of 0x1D.

    handle : s32 - Empty device handle for a SC16IS741
    cs : s32 - Pin used for the CS signal
    -1 - I2C mode enabeld
    >= 0 - Pin used for the CS signal (Only GPIO pins are supported, starting with 0 for the first GPIO of the device)
    int : s32 - Pin used for the receive interrupt signal
    -1 - The interrupt pin is not used by the library. The library will work in polled mode.
    >= 0 - Pin used for the receive interrupt signal (Only INT0 and INT1 pin is supported)
    reset : s32 - Pin used for the reset signal
    -1 - The reset pin is not used by the library.
    >= 0 - Pin used for the reset signal (Only GPIO pins are supported, starting with 0 for the first GPIO of the device)
    port : s32 - interface (SPI or I2C) where SC16IS741 is connected to
    The interface must be initialisation before using rM2M_SpiInit() or rM2M_I2cInit().
    addr : s32 - I2C Address of the chip
    -1 - SPI mode enabeld
    >= 0 - I2C Address of the chip (Use only the addresses specified under SC16IS741_I2C_ADRx)
    returns : s32
    OK - if successful
    ERROR - if one of the following errors occurs
  • Interface selection (SPI or IC) is not clear
  • INT pin not valid or already in use
  • Reset pin not valid
  • CS pin not valid or already in use in SPI mode
  • SPI or I2C port not valid
  • I2C address not valid in I2C mode
  • Address in I2C mode alreay in use
  • No free handle. Increase SC16IS741_MAX_IF
  • < OK - if another error occurs
    SC16IS741_Open_RS485_Mode(handle, baudrate, config)

    Activates the SC16IS741 in Auto RS-485 RTS control.


    In this mode, the transmitter of the SC16IS741 controls the state of the RTS pin. It automatically sets the RTS pin to logic "1" as long as there is data to send in the transmit FIFO buffer. The function adjusts the following settings:
    • Reset the Rx/Tx FIFO buffers
    • Enable the Rx/Tx FIFO with
      • Rx trigger level of 16 characters
      • Tx trigger level of 8 spaces (currently not used)
    • Adjust desired UART baudrate
    • Configure UART parameters (e.g 7/8 Data-bit, Stopbit yes/no, Parity yes/no, etc.)
    • Enable auto RS485 RTS direction control
    • Disable sleep mode
    • Enable Rx data available interrupt on the SC16IS741 and attach the relevant INT pin to the interrupt service routine (optionally)

    handle : s32 - Device handle of a specific SC16IS741 (Initialized by SC16IS741_Init() )
    baudrate : s32 - Baudrate for the UART interface (50...115200)
    config : s32 - UART configuration (e.g 7/8 Data-bit, Stopbit yes/no, Parity yes/no, etc. use SC16IS741_MODE_xxx)
    returns : s32
    OK - if successful
    ERROR - if one of the following errors occurs
  • Interface not initialized
  • Invalid value for baudrate
  • SC16IS741_Write(handle, data{}, len)

    Write data to the SC16IS741


    The send buffer is filled up with the data to be sent. Then a bulk write operation via SPI/I2C is triggered. In case, not all data was fitting into the send buffer in the first step, the send buffer is filled up again with the remaining data to be sent.

    handle : s32 - Device handle of a specific SC16IS741 (Initialized by SC16IS741_Init() )
    data{} : u8 - Data buffer to write
    len : s32 - Number of bytes in the data buffer
    returns : s32
    > = 0 - number of sent bytes
    ERROR - if one of the following errors occurs
  • Interface not initialized
  • Number of bytes is <= 0
  • Number of bytes is bigger then send buffer size SC16IS741_SBUFFER_SIZE
  • SC16IS741_Receive_Callback(handle, data{}, len, status)

    Called every time when data has been received by the SC16IS741

    handle : s32 - Device handle of a SC16IS741. This must be evaluated in order to determine which of the SC16IS741 used the received data are to be assigned.
    data{} : u8 - Data buffer with received data
    len : s32 - Number of bytes in the data buffer
    status : s32 - Status information about the received data (see following bits from SC16IS741_LSR_x)
    OK - if the data in the buffer are valid
    > OK - The data in the buffer are corrupt. The set bits indicate which error occurred:
    • SC16IS741_RX_FIFO_LVL_ERROR_BIT: read Rx FIFO fill level is invalid
    • SC16IS741_LSR_FIFOE_BIT: at least one parity error, framing error, or break indication is in the receiver FIFO.
    • SC16IS741_LSR_OE_BIT: overrun error has occurred
    SC16IS741_Close(handle)

    Disables Rx/Tx functions as well as all interrupts and enables the sleep mode of the SC16IS741

    handle : s32 - Device handle of a specific SC16IS741 (Initialized by SC16IS741_Init() )
    returns : s32
    OK - if successful
    SC16IS741_OK_CLOSING - Pending data in the TX FIFO of the SC16IS741 when trying to close the interface. The library waits in the background until all remaining data has been transferred and then closes the interface.
    ERROR - if interface is not initialized or not open

    EXPERT

    Advanced_Config:
    The settings mentioned in this chapter should only be changed if really required (e.g. more than one SC16IS741 or memory saving required). To adapt the settings add the following macro to the main.dde file.
    /** * Use this macro to adapt the advanced configuration settings: * */ #define SC16IS741_SBUFFER_SIZE 256 // Size of the send buffer (used for SC16IS741_Write()) #define SC16IS741_MAX_IF 1 // Number of SC16IS741 that can be managed by the library #define SC16IS741_XTAL 1843200 // Clock frequenz [Hz] used for the baud rate oscillator
    SC16IS741_SPICLK_MAX -

    absolute maximum SPI clock speed (4MHz)

    SC16IS741_I2C_CLOCK_MAX -

    absolute maximum I2C clock speed (400kHz, I2C Fast-Mode)

    SC16IS741_SBUFFER_SIZE -

    send buffer size [bytes] (default = 256 bytes)

    SC16IS741_MAX_IF -

    sets the maximum number of SC16IS741 that can be managed by the library. (default = 1)

    SC16IS741_XTAL -

    Clock frequenz [Hz] used for the baud rate oscillator (default = 1843200)

    SC16IS741_REG_x:

    SC16IS741 Available register (Address | R/W | Default | Description)

    General register set:
    SC16IS741_REG_RHR - 0x00 | R | 0x00 |
    Receive holding register (is actually a 64-byte FIFO which stores the received characters from the UART)
    SC16IS741_REG_THR - 0x00 | W | 0x00 |
    Transmit holding register (is actually a 64-byte FIFO which buffers the data to be transmitted via the UART)
    SC16IS741_REG_IER - 0x01 | R/W | 0x00 |
    Interrupt enable register (used to enabeld interrupts (receiver error , RHR interrupt, THR interrupt, modem status, Xoff received, or CTS/RTS change of state) and enable sleep mode, see SC16IS741_IER_x)
    SC16IS741_REG_FCR - 0x02 | W | 0x00 |
    FIFO control register (used for enabling the FIFOs, clearing the FIFOs, setting transmitter and receiver trigger levels, see SC16IS741_FCR_x)
    SC16IS741_REG_IIR - 0x02 | R | 0x01 |
    Interrupt identification register (provides information about the interrupt source , see SC16IS741_IIR_x)
    SC16IS741_REG_LCR - 0x03 | R/W | 0x1D |
    Line control register (controls data communication format i.e. word length, number of stop bits, and parity type, see SC16IS741_LCR_x)
    SC16IS741_REG_MCR - 0x04 | R/W | 0x00 |
    Modem control register (controls modem interface settings i.e. clock divisor, RTS control, see SC16IS741_MCR_x)
    SC16IS741_REG_LSR - 0x05 | R | 0x60 |
    Line status register (provides information about the line state i.e. FIFO data error, buffer states, break interrupt, framing error, parity errors, overrun error, data in receiver see SC16IS741_LSR_x)
    SC16IS741_REG_MSR - 0x06 | R | 0xX0 |
    Modem status register (provides information about the CTS input , see SC16IS741_MSR_x )
    SC16IS741_REG_SPR - 0x07 | R/W | 0xXX |
    Scratch pad register (is intended for programmer use as a scratchpad)
    SC16IS741_REG_TCR - 0x06 | R/W | 0x00 |
    Transmission control register (used to store RX FIFO threshold levels to stop/start transmission, see SC16IS741_TCR_x)
    Only accessible when SC16IS741_MCR_ENA_BIT and SC16IS741_EFR_ENABLE_BIT are set.
    SC16IS741_REG_TLR - 0x07 | R/W | 0x00 |
    Trigger level register (used to store RX/TX FIFO trigger levels used for interrupt generation, see SC16IS741_TLR_x)
    Only accessible when SC16IS741_MCR_ENA_BIT and SC16IS741_EFR_ENABLE_BIT are set.
    SC16IS741_REG_TXLVL - 0x08 | R | 0x40 |
    TX FIFO level register (reports the number of spaces available in the transmit FIFO)
    SC16IS741_REG_RXLVL - 0x09 | R | 0x00 |
    RX FIFO level register (reports the fill level of the receive FIFO)
    SC16IS741_REG_RESET - 0x0E | R/W | 0x00 |
    UART reset register (SC16IS741_RESET_BIT performs a UART software reset)
    SC16IS741_REG_EFCR - 0x0F | R/W | 0x00 |
    Extra features control register (controls extra features i.e. IrDA mode, RS-485 mode, disable transmitter, disable receiver. .9-bit mode, see SC16IS741_EFCR_x)

    Special register set
  • The special register set is only accessible when SC16IS741_LCR_DLAB_BIT = 1 and SC16IS741_LCR_x is not 0xBF
  • SC16IS741_REG_DLL and SC16IS741_REG_DLH can only be written to before Sleep mode is enabled, that is, before SC16IS741_IER_SLEEP_BIT is set.
  • SC16IS741_REG_DLL - 0x00 | R/W | 0xXX |
    Divisor Latch LSB register (LSB of the 16-bit divisor for generation of the baud clock in the baud rate generator.)
    SC16IS741_REG_DLH - 0x01 | R/W | 0xXX |
    Divisor Latch MSB register (MSB of the 16-bit divisor for generation of the baud clock in the baud rate generator.)

    Enhanced register set
    The enhanced register set is only accessible when SC16IS741_LCR_x = 0xBF
    SC16IS741_REG_EFR - 0x02 | R/W | 0x00 |
    Enhanced features register (controls enhanced features of the UART i.e. flow control, special character detection, see SC16IS741_EFR_x)
    SC16IS741_REG_XON1 - 0x04 | R/W | 0xXX |
    Xon1 word register (stores the Xon1 character used for software flow control)
    SC16IS741_REG_XON2 - 0x05 | R/W | 0xXX |
    Xon2 word register (stores the Xon2 character used for software flow control)
    SC16IS741_REG_XOFF1 - 0x06 | R/W | 0xXX |
    Xoff1 word register (stores the Xoff1 character used for software flow control)
    SC16IS741_REG_XOFF2 - 0x07 | R/W | 0xXX |
    Xoff2 word register (stores the Xoff2 character used for software flow control)
    SC16IS741_IER_x:

    Interrupt Enable Register

    SC16IS741_IER_CTS_BIT - bit 7: Enable CTS interrupt
    can only be modified when SC16IS741_EFR_ENABLE_BIT is set.
    0 - disable the CTS interrupt (default)
    1 - enable the CTS interrupt
    SC16IS741_IER_RTS_BIT - bit 6: Enable RTS interrupt
    can only be modified when SC16IS741_EFR_ENABLE_BIT is set.
    0 - disable the RTS interrupt (default)
    1 - enable the RTS interrupt
    SC16IS741_IER_XOFF_BIT - bit 5: Enable Xoff interrupt
    can only be modified when SC16IS741_EFR_ENABLE_BIT is set.
    0 - disable the Xoff interrupt (default)
    1 - enable the Xoff interrupt
    SC16IS741_IER_SLEEP_BIT - bit 4: Enable Sleep mode
    can only be modified when SC16IS741_EFR_ENABLE_BIT is set.
    0 - disable Sleep mode (default)
    1 - enable Sleep mode
    SC16IS741_IER_MSI_BIT - bit 3: Enable Modem status interrupt
    0 - disable the modem status interrupt (default)
    1 - enable the modem status interrupt
    SC16IS741_IER_RLSI_BIT - bit 2: Enable RX line status interrupt
    0 - disable the receiver line status interrupt (default)
    1 - enable the receiver line status interrupt
    SC16IS741_IER_THRI_BIT - bit 1: Enable TX holding register interrupt
    0 - disable the THR interrupt (default)
    1 - enable the THR empty interrupt
    SC16IS741_IER_RDI_BIT - bit 0: Enable RX holding register interrupt
    0 - disable the RHR interrupt (default)
    1 - enable the RX data available interrupt.
    SC16IS741_FCR_x:

    FIFO Control Register

    SC16IS741_FCR_RXLVL_x - bit 6-7: Trigger level for the RX FIFO.
    SC16IS741_FCR_TXLVL_x - bit 4-5: Trigger level for the TX FIFO.
    can only be modified and enabled when SC16IS741_EFR_ENABLE_BIT is set.
    SC16IS741_FCR_TXRESET_BIT - bit 2: Reset TX FIFO
    0 - no FIFO transmit reset (default)
    1 - clears the contents of the transmit FIFO and resets the FIFO level logic (the Transmit Shift Register is not cleared or altered). This bit will return to a logic 0 after clearing the FIFO
    SC16IS741_FCR_RXRESET_BIT - bit 1: Reset RX FIFO
    0 - no FIFO receive reset (default)
    1 - clears the contents of the receive FIFO and resets the FIFO level logic (the Receive Shift Register is not cleared or altered). This bit will return to a logic 0 after clearing the FIFO
    SC16IS741_FCR_FIFO_BIT - bit 0: Enables or disables the transmit and receive FIFO
    0 - disable (default)
    1 - enable FIFO mode
    SC16IS741_FCR_RXLVL_x:

    Trigger level for the RX FIFO (FIFO Control Register, bit 6-7)

    SC16IS741_FCR_RXLVL_8 - (0x00 << 6): 8 characters (default)
    SC16IS741_FCR_RXLVL_16 - (0x01 << 6): 16 characters
    SC16IS741_FCR_RXLVL_56 - (0x02 << 6): 56 characters
    SC16IS741_FCR_RXLVL_60 - (0x03 << 6): 60 characters
    SC16IS741_FCR_RXLVL_MSK - (0x03 << 6): RX Trigger level bit mask
    SC16IS741_FCR_TXLVL_x:

    Trigger level for the TX FIFO (FIFO Control Register, bit 4-5)

    SC16IS741_FCR_TXLVL_8 - (0x00 << 4): 8 spaces (default)
    SC16IS741_FCR_TXLVL_16 - (0x01 << 4): 16 spaces
    SC16IS741_FCR_TXLVL_56 - (0x02 << 4): 56 spaces
    SC16IS741_FCR_TXLVL_60 - (0x03 << 4): 60 spaces
    SC16IS741_FCR_TXLVL_MSK - (0x03 << 4): TX Trigger level bit mask
    SC16IS741_IIR_x:

    Interrupt Identification Register

    Burst reads on the serial interface (that is, reading multiple elements on the I2C-bus without a STOP or repeated START condition, or reading multiple elements on the SPI bus without de-asserting the CS pin), should not be performed on the IIR register.
    SC16IS741_IIR_FIFO_BIT7 - bit 7: FIFO enabled
    The contents of SC16IS741_FCR_FIFO_BIT is mirrored to this bit.
    SC16IS741_IIR_FIFO_BIT6 - bit 6: FIFO enabled
    The contents of SC16IS741_FCR_FIFO_BIT is mirrored to this bit.
    SC16IS741_IIR_x_SRC - bit 1-5: Interrupt source
    SC16IS741_IIR_NO_INT_BIT - bit 0: Interrupt status
    0 - an interrupt is pending
    1 - no interrupt is pending
    SC16IS741_IIR_x_SRC:

    bit 5-1: Interrupt source (Interrupt Identification Register, bit 1-5)

    SC16IS741_IIR_RLSE_SRC - (0x03 << 1): Priority 1: RX line status error
    SC16IS741_IIR_RTOI_SRC - (0x06 << 1): Priority 2: RX time-out interrupt
    SC16IS741_IIR_RDI_SRC - (0x02 << 1): Priority 3: RHR interrupt
    SC16IS741_IIR_THRI_SRC - (0x01 << 1): Priority 4: THR interrupt
    SC16IS741_IIR_MSI_SRC - (0x00 << 1): Priority 5: Modem interrupt
    SC16IS741_IIR_XOFFI_SRC - (0x08 << 1): Priority 6: Received Xoff / special character
    SC16IS741_IIR_CTSRTS_SRC - (0x10 << 1): Priority 7: nCTS, nRTS change of state from active (LOW) to inactive (HIGH)
    SC16IS741_LCR_x:

    Line Control Register

    SC16IS741_LCR_DLAB_BIT - bit 7: Divisor Latch enable
    0 - divisor latch disabled (default)
    1 - divisor latch enabled
    SC16IS741_LCR_TXBREAK_BIT - bit 6: Beak control bit
    0 - no TX break condition (default)
    1 - forces the transmitter output (TX) to a logic 0
    SC16IS741_LCR_FORCEPARITY_BIT - bit 5: Forced parity format
    0 - parity is not forced (default)
    1 - with SC16IS741_LCR_EVENPARITY_BIT = 0: parity bit is forced to a logical 1 for the transmit and receive data.
    1 - with SC16IS741_LCR_EVENPARITY_BIT = 1: parity bit is forced to a logical 0 for the transmit and receive data.
    SC16IS741_LCR_EVENPARITY_BIT - bit 4: Parity type select
    0 - odd parity is generated (if SC16IS741_LCR_PARITY_BIT = 1)
    1 - even parity is generated (if SC16IS741_LCR_PARITY_BIT = 1)
    SC16IS741_LCR_PARITY_BIT - bit 3: Parity enable
    0 - no parity (default)
    1 - parity bit is generated during transmission and the receiver checks for received parity
    SC16IS741_LCR_STOPLEN_BIT - bit 2: Number of stop bits
    0 - 1 stop bit (any word length)
    1 - 1.5 stop bits (word length = 5), 2 stop bits (word length = 6, 7, 8)
    SC16IS741_LCR_WORD_LEN_x - bit 0-1: Word length
    SC16IS741_LCR_WORD_LEN_x:

    bit 0-1: Word length (Line Control Register, bit 0-1)

    SC16IS741_LCR_WORD_LEN_8 - (0x03): Word length 8 bits
    SC16IS741_LCR_WORD_LEN_7 - (0x02): Word length 7 bits
    SC16IS741_LCR_WORD_LEN_6 - (0x01): Word length 6 bits
    SC16IS741_LCR_WORD_LEN_5 - (0x00): Word length 5 bits
    SC16IS741_MCR_x:

    Modem Control Register

    SC16IS741_MCR_DIV_BIT - bit 7: Clock divisor
    can only be modified when SC16IS741_EFR_ENABLE_BIT is set.
    0 - divide-by-1 clock input
    1 - divide-by-4 clock input
    SC16IS741_MCR_IRDA_BIT - bit 6: IrDA mode enable
    can only be modified when SC16IS741_EFR_ENABLE_BIT is set.
    0 - normal UART mode
    1 - IrDA mode
    SC16IS741_MCR_XON_BIT - bit 5: Xon any function
    can only be modified when SC16IS741_EFR_ENABLE_BIT is set.
    0 - disable Xon Any function
    1 - enable Xon Any function
    SC16IS741_MCR_LOOP_BIT - bit 4: Loopback enable
    0 - normal operating mode
    1 - enable local Loopback mode (internal). In this mode the SC16IS741_MCR_RTS_BIT is looped back into SC16IS741_MSR_CTS_BIT and the TX output is looped back to the RX input internally.
    SC16IS741_MCR_ENA_BIT - bit 2: TCR and TLR enable
    can only be modified when SC16IS741_EFR_ENABLE_BIT is set.
    0 - disable the SC16IS741_REG_TCR and SC16IS741_REG_TLR register.
    1 - enable the SC16IS741_REG_TCR and SC16IS741_REG_TLR register.
    SC16IS741_MCR_RTS_BIT - bit 1: Control RTS output
    0 - force nRTS output to inactive (HIGH)
    1 - force RTS output to active (LOW). In Loopback mode, it controls SC16IS741_MSR_CTS_BIT. If Auto RTS is enabled, the RTS output is controlled by hardware flow control.
    SC16IS741_LSR_x:

    Line Status Register

    SC16IS741_LSR_FIFOE_BIT - bit 7: FIFO data Error
    0 - no error (default)
    1 - at least one parity error, framing error, or break indication is in the receiver FIFO. This bit is cleared when no more errors are present in the FIFO.
    SC16IS741_LSR_TEMT_BIT - bit 6: THR and TSR empty. This bit is the Transmit Empty indicator.
    0 - transmitter hold and shift registers are not empty
    1 - transmitter hold and shift registers are empty
    SC16IS741_LSR_THRE_BIT - bit 5: THR empty. This bit is the Transmit Holding Register Empty indicator.
    0 - transmit hold register is not empty
    1 - transmit hold register is empty. The host can now load up to 64 characters of data into the THR if the TX FIFO is enabled.
    SC16IS741_LSR_BI_BIT - bit 4: Break Interrupt
    0 - no break condition (default)
    1 - the received data input was held clear for longer than a full-word transmission time.
    SC16IS741_LSR_FE_BIT - bit 3: Frame Error
    0 - no framing error in data being read from RX FIFO (default)
    1 - framing error occurred in data being read from RX FIFO
    SC16IS741_LSR_PE_BIT - bit 2: Parity Error
    0 - no parity error (default)
    1 - parity error in data being read from RX FIFO
    SC16IS741_LSR_OE_BIT - bit 1: Overrun Error
    0 - no overrun error (default)
    1 - overrun error has occurred in the SC16IS741_REG_RHR
    SC16IS741_LSR_DR_BIT - bit 0: Receiver data ready
    0 - no data in receive FIFO (default)
    1 - at least one character in the RX FIFO
    SC16IS741_MSR_x:

    Modem Status Register

    SC16IS741_MSR_CTS_BIT - bit 4: CTS
    This bit is the complement of the CTS input.
    SC16IS741_MSR_DCTS_BIT - bit 0: Delta CTS
    Indicates that CTS input has changed state. Cleared on a read.
    SC16IS741_TCR_x:

    Transmission control register

    This register is used to store the RX FIFO threshold levels to stop/start transmission during hardware/software flow control. TCR trigger levels are available from 0 to 60 characters with a granularity of four.
    is only accessible when SC16IS741_MCR_ENA_BIT and SC16IS741_EFR_ENABLE_BIT are set.
    SC16IS741_TCR_RESUME_MASK - bit 4-7: RX FIFO trigger level to resume
    SC16IS741_TCR_HALT_MASK - bit 0-3: RX FIFO trigger level to halt transmission
    SC16IS741_TLR_x:

    Trigger level register

    This register is used to store the transmit and received FIFO trigger levels used for interrupt generation. Trigger levels from 4 to 60 can be programmed with a granularity of 4. When the trigger level setting in TLR is zero, the trigger level setting defined in SC16IS741_REG_FCR is used.
    is only accessible when SC16IS741_MCR_ENA_BIT and SC16IS741_EFR_ENABLE_BIT are set.
    SC16IS741_TLR_RX_MASK - bit 4-7: RX FIFO trigger levels (4 to 60), number of characters available.
    SC16IS741_TLR_TX_MASK - bit 0-3: TX FIFO trigger levels (4 to 60), number of spaces available.
    SC16IS741_RESET_x:

    UART Reset Register

    SC16IS741_RESET_BIT - bit 3: UART software reset
    Performs a software reset of the SC16IS741.
    SC16IS741_EFCR_x:

    Extra Feature Register

    SC16IS741_EFCR_IRDA_MODE_BIT - bit 7: IrDA mode
    0 - IrDA SIR, 3/16 pulse ratio, data rate up to 115.2 kbit/s
    SC16IS741_EFCR_RTS_INVERT_BIT - bit 5: invert RTS signal in Auto RS485 mode
    0 - RTS = 0 during transmission and RTS = 1 during receiving
    1 - RTS = 1 during transmission and RTS = 0 during receiving
    SC16IS741_EFCR_AUTO_RS485_BIT - bit 4: Auto RS485 RTS direction control
    0 - transmitter does not control RTS pin
    1 - transmitter controls RTS pin
    SC16IS741_EFCR_TXDISABLE_BIT - bit 2: Disable transmitter
    0 - transmitter is enabled
    1 - transmitter is disabled. UART does not send any data on the TX pin. TX FIFO is filled up until it is full.
    SC16IS741_EFCR_RXDISABLE_BIT - bit 1: Disable receiver
    0 - receiver is enabled
    1 - receiver is disabled. UART will stop receiving data immediately.
    SC16IS741_EFCR_9BIT_MODE_BIT - bit 0: Enable 9-bit or Multidrop mode (RS485)
    0 - normal mode
    1 - enables RS-485 multidrop mode
    SC16IS741_EFR_x:

    Enhanced Feature Register

    The enhanced feature register is only accessible when SC16IS741_LCR_x = 0xBF
    SC16IS741_EFR_AUTOCTS_BIT - bit 7: CTS flow control enable
    0 - CTS flow control is disabled (default)
    1 - CTS flow control is enabled. Transmission will stop when a HIGH signal is detected on the CTS pin.
    SC16IS741_EFR_AUTORTS_BIT - bit 6: RTS flow control enable
    0 - RTS flow control is disabled (default)
    1 - RTS flow control is enabled. The RTS pin goes HIGH when the receiver FIFO halt trigger level SC16IS741_TCR_HALT_MASK is reached, and goes LOW when the receiver FIFO resume transmission trigger level SC16IS741_TCR_RESUME_MASK is reached (see SC16IS741_TCR_x).
    SC16IS741_EFR_XOFF2_DETECT_BIT - bit 5: Special character detect
    0 - Special character detect disabled (default)
    1 - Special character detect enabled. Received data is compared with Xoff2 data. If a match occurs, the received data is transferred to FIFO and SC16IS741_IIR_XOFFI_SRC is set to a logical 1 to indicate a special character has been detected (see SC16IS741_IIR_x_SRC).
    SC16IS741_EFR_ENABLE_BIT - bit 4: Enhanced functions enable bit
    0 - disables enhanced functions and writing to SC16IS741_IER_x [bit 4-7], SC16IS741_FCR_x [bit 4-5], SC16IS741_MCR_x [bit 5-7].
    1 - enables the enhanced function SC16IS741_IER_x [bit 4-7], SC16IS741_FCR_x [bit 4-5], and SC16IS741_MCR_x [bit 5-7] so that they can be modified.
    SC16IS741_EFR_SWFLOW_TX_x - bit 2-3: Transmit software flow control
    SC16IS741_EFR_SWFLOW_RX_x - bit 0-1: Receive software flow control
    SC16IS741_EFR_SWFLOW_TX_x:

    Transmit software flow control (Enhanced Feature Register, bit 2-3)

    SC16IS741_EFR_SWFLOW_TX_OFF - (0x00 << 2): no transmit flow control
    SC16IS741_EFR_SWFLOW_TX_XOX2 - (0x01 << 2): transmitter generates XON2 and XOFF2
    SC16IS741_EFR_SWFLOW_TX_XOX1 - (0x02 << 2): transmitter generates XON1 and XOFF1
    SC16IS741_EFR_SWFLOW_TX_XOX12 - (0x03 << 2): transmitter generates XON1, XON2, XOFF1 and XOFF2
    SC16IS741_EFR_SWFLOW_RX_x:

    Receiver software flow control (Enhanced Feature Register, bit 0-1)

    SC16IS741_EFR_SWFLOW_RX_OFF - (0x00 << 0): no receiver flow control
    SC16IS741_EFR_SWFLOW_RX_XOX2 - (0x01 << 0): receiver compares XON2 and XOFF2
    SC16IS741_EFR_SWFLOW_RX_XOX1 - (0x02 << 0): receiver compares XON1 and XOFF1
    SC16IS741_EFR_SWFLOW_RX_XOX12 - (0x03 << 0): receiver compares XON1, XON2, XOFF1 and XOFF2
    SC16IS741_ReadReg(handle, reg, &val)

    Reads register of SC16IS741


    Use this function to read an unsigned 8-Bit register of the SC16IS741.

    handle : s32 - Device handle of a specific SC16IS741 (Initialized by SC16IS741_Init() )
    reg : s32 - Register address to be read (use SC16IS741_REG_x)
    val : s32 - Variable for storing the data read from the SC16IS741
    SC16IS741_WriteReg(handle, reg, val)

    Writes register of SC16IS741


    Use this function to write an unsigned 8-Bit register of the SC16IS741.

    handle : s32 - Device handle of a specific SC16IS741 (Initialized by SC16IS741_Init() )
    reg : s32 - Register address to write (use SC16IS741_REG_x)
    val : s32 - Data to be written to the SC16IS741
    SC16IS741_UpdateReg(handle, reg, mask, value)

    Updates register of SC16IS741


    Use this function to update an unsigned 8-Bit register of the SC16IS741. Only bits contained in the mask parameter are changed.

    handle : s32 - Device handle of a specific SC16IS741 (Initialized by SC16IS741_Init() )
    reg : s32 - Register address to update (use SC16IS741_REG_x)
    mask : s32 - Only bits included in this provided bitmask will be updated.
    val : s32 - Data to be written to the SC16IS741

    DEBUG

    Debug Config:
    To configure debug mode add the following macro to the main.dde file.
    /** * Use this macro to configure the debug mode: * * 0: No outputs * 1: Output the reasons for error returns of functions * 2: Output error reasons + Extended debug output (e.g. raw data * transmitted via the serial interface) */ #define SC16IS741_DEBUG 0

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    SC16IS741 - Single UART with I2C-bus/SPI interface