AD7792/AD7793 - 3-Channel, 16-/24-Bit ∑-Δ ADC

Description

Library for interfacing Analog Devices AD7792/AD7793 3-Channel 16-/24-Bit ∑-Δ ADC

The AD7792/AD7793 are low power, low noise, complete analog front ends for high precision measurement applications and contain a low noise 16-/24-bit ∑-Δ ADC with three differential analog inputs. The on-chip, low noise instrumentation amplifier means that signals of small amplitude can be interfaced directly to the ADC.

Features:

  • SPI interface with communication speed up to 5 MHz
  • Up to 23 bits effective resolution
  • Low noise programmable gain instrumentation amp
  • Band gap reference with 4 ppm/°C drift typical
  • 3 differential inputs
  • Programmable current sources

OVERVIEW

AD7792_Abstract:
This library can be used to handle Analog Devices AD7792/AD7793 3-Channel 16-/24-Bit ∑-Δ ADCs.

Interfaces:
  • 1x SPI
  • 1x GPIO

  • The AD7792/AD7793 are low power, low noise, complete analog front ends for high precision
    measurement applications and contain a low noise 16-/24-bit ∑-Δ ADC with three differential analog inputs. The on-chip, low noise instrumentation amplifier means that signals of small amplitude can be interfaced directly to the ADC.
  • SPI interface with communication speed up to 5 MHz
  • Up to 23 bits effective resolution
  • Low noise programmable gain instrumentation amp
  • Band gap reference with 4 ppm/°C drift typical
  • 3 differential inputs
  • Programmable current sources
  • AD7792_How_to_use:
    /* Hardware setup */ const { PORT_SPI = 0, // The first SPI interface should be used. PIN_CS = 0, // The first GPIO should be used for the CS signal } /* Handles for available sensors */ new hADC[TAD7792_Handle]; // Handle to manage the AD7792 main() { new iStatus; // Status read from the AD7792 // inits the SPI interface catch(rM2M_SpiInit(PORT_SPI, AD7792_SPICLK, AD7792_SPIMODE)); // Initializes SPI communication with the AD7792 catch (AD7792_Init(hADC, PIN_CS, PORT_SPI)); // Reads the current status from the AD7792 AD7792_Read(hADC, AD7792_REG_STATUS, iStatus); // Issues the current status via the watch panel #watch("status=Current Status: %02x", iStatus); }

    BASIC

    AD7792_SPICLK -

    typical SPI clock speed to be used

    AD7792_SPIMODE -

    configuration of clock polarity and clock phase for the AD7792

    AD7792_Init(handle[TAD7792_Handle], cs, spi)

    Initializes SPI communication with the AD7792


    First of all the CS port and SPI interface are copied to the transferred device handle. The used CS pin is configured as output and set to high to avoid data transfer at the beginning. Then the AD7792 is reset by writing 32-Bits consecutive 1s to the SPI interface. Afterwards the ID and configuration register are checked to ensure that the AD7792 was initialised correctly

    handle : TAD7792_Handle - Empty device handle for a AD7792
    cs : s32 - Pin used for the CS signal (Only GPIO pins are supported, starting with 0 for the first GPIO of the device)
    spi : s32 - SPI interface where AD7792 is connected to
    The SPI interface must be initialisation before using rM2M_SpiInit().
    returns : s32
    OK - if successful
    ERROR - if one of the following errors occurs
  • Found chip not supported by the library
  • Content of the configuration register is invalid
  • < OK - if another error occurs

    EXPERT

    AD7792_SPICLK_MAX -

    absolute maximum SPI clock speed (5MHz)

    AD7792_INTREF -

    internal reference voltage (1.17V)

    AD7792_REG_x:

    Available register (Address | R/W | Default | Description)

    AD7792_REG_COM - 0x00 | W | 0x00 |
    Communications Register During a Write Operation (see AD7792_COM_x)
    The write operation to the communications register which is necessary for each access to the AD7792 is done by the AD7792_Read() and the AD7792_Write() functions. Therefore, the user should not need this register
    AD7792_REG_STATUS - 0x00 | R | 0x80 (AD7792) / 0x88 (AD7793) |
    Status Register During a Read Operation (Ready Bit for ADC, ADC Error Bit, AD7792/AD7793 identification and indication, which channel is being converted by the ADC, see AD7792_STATUS_x )
    AD7792_REG_MODE - 0x01 | R/W | 0x000A |
    Mode Register (operating mode, filter update rate and clock source, see AD7792_MODE_x)
    Any write to the setup register resets the modulator and filter and sets the NRDY bit.
    AD7792_REG_CONFIG - 0x02 | R/W | 0x0710 |
    Configuration Register ( unipolar or bipolar mode, enable or disable the buffer, enable or disable the burnout currents, select the gain, and select the analog input channel, see AD7792_CFG_x )
    AD7792_REG_DATA - 0x03 | R | 0x0000 |
    The conversion result from the ADC is stored in this data register. On completion of a read operation fromthis register, the NRDY bit/pin is set.
    AD7792_REG_ID - 0x04 | R | 0xXA (AD7792) / 0xXB (AD7793) |
    ID Register (Identification number for the AD7792/AD7793)
    AD7792_REG_IO - 0x05 | R/W | 0x00 |
    IO Regsiter (enable and select the value of the excitation currents, see AD7792_IO_x)
    AD7792_REG_OFFSET - 0x06 | R/W | 0x8000 (AD7792) / 0x800000 (AD7793) |
    Each analog input channel has a dedicated offset register that holds the offset calibration coefficient for the channel.
    The AD7792/AD7793 must be in idle mode or power-down mode when writing to the offset register.
    AD7792_REG_FS - 0x07 | R/W | 0x5XXX(AD7792) / 0x5XXX00 (AD7793) |
    The full-scale register holds the full-scale calibration coefficient for the ADC. The AD7792/AD7793 have3 full-scale registers, each channel having a dedicated full-scale register.
    The AD7792/AD7793 must be in idle mode or power-down mode when writing to the full-scale register.
    AD7792_COM_x:

    Communications register configuration bits

    AD7792_COM_WEN - bit7: Write Enable Bit
    0 - Write to the communications register actually occurs (default)
    1 - Stays at this bit location until a 0 is written to this bit. Once a 0 is written to this bit, the next seven bits are loaded to the communications register.
    AD7792_COM_WRITE - bit6 (0): The next operation is a write to a specified register (default)
    AD7792_COM_READ - bit6 (1): The next operation is a read to a specified register
    AD7792_COM_RSx - bit 3-5: Register Address Bits (use "AD7792_REG_x & AD7792_ADDR_MSK").
    AD7792_COM_CREAD - bit2: Continuous Read of the Data Register.
    0 - Exit the continuous read mode (default)
    1 - (And the data register is selected) The serial interface is configured so that the data register can be continuously read.
  • To enable continuous read mode, the instruction 01011100 must be written to the communications register.
  • To exit the continuous read mode, the instruction 01011000 must be written to the communications register while the RDY pin is low.
  • AD7792_COM_CR1 - bit1: Must be 0 for correct operation (i.e. do not use).
    AD7792_COM_CR0 - bit0: Must be 0 for correct operation (i.e. do not use).

    AD7792_COM_DEFAULT - (0x00): Default state of the register
    AD7792_STATUS_x:

    Status Register register bits

    AD7792_STATUS_NRDY - bit7: Ready Bit for ADC.
    0 - Cleared when data is written to the ADC data register.
    1 - Set automatically after the ADC data register has been read or a period of time before the data register is updated with a new conversion result to indicate to the user not to read the conversion data. It is also set when the part is placed in power-down mode.
    AD7792_STATUS_ERR - bit6: ADC Error Bit
    0 - Cleared by a write operation to start a conversion.
    1 - Set to indicate that the result written to the ADC data register has been clamped to all 0s or all 1s
    AD7792_STATUS_SR5 - bit5: Reserved: Always reads 0
    AD7792_STATUS_SR4 - bit4: Reserved: Always reads 0
    AD7792_STATUS_AD7793 - bit3: AD7792/AD7793 identification
    0 - AD7792
    1 - AD7793
    AD7792_STATUS_CH_x - bit 0-2: Indication which channel is being converted by the ADC

    AD7792_STATUS_DEFAULT - (0x80): Default state of the register for AD7792
    AD7793_STATUS_DEFAULT - (0x88): Default state of the register for AD7793
    AD7792_STATUS_CH_x:

    Indication which channel is being converted by the ADC (Status Register, bit 0-2)

    AD7792_STATUS_CH_AIN1 - (0x00): AIN1(+) – AIN1(–)
    AD7792_STATUS_CH_AIN2 - (0x01): AIN2(+) – AIN2(–)
    AD7792_STATUS_CH_AIN3 - (0x02): AIN3(+) – AIN3(–)
    AD7792_STATUS_CH_AIN1_AIN1 - (0x03): AIN1(–) – AIN1(–)
    AD7792_STATUS_CH_TEMP - (0x06): Temp Sensor
    Automatically selects gain = 1 and internal reference
    AD7792_STATUS_CH_AVdd - (0x07): AVDD Monitor
    Automatically selects gain = 1/6 and 1.17 V reference
    AD7792_STATUS_CH_MSK - (0x07): Channel Selection bit mask
    AD7792_MODE_x:

    Mode Register configuration bits (operating mode, filter update rate and clock source)

    AD7792_MODE_MD_x - bit 13-15: Operating mode
    AD7792_MODE_MR8_MR12_MSK - bit8-12: Must be 0 for correct operation (i.e. do not use).
    AD7792_MODE_CLK_x - bit 6-7: Clock source
    AD7792_MODE_MR4_MR5_MSK - bit 4-5: Must be 0 for correct operation (i.e. do not use).
    AD7792_MODE_FS_x - bit 0-3: Filter Update Rate
    AD7792_MODE_MD_x:

    Operating mode (Mode Register, bit 13-15 )

    AD7792_MODE_MD_CONT_CONV - (0x0000 << 13): Continuous conversion mode (default)
    In continuous conversion mode, the ADC continuously performs conversions and places the result in the data register.
    AD7792_MODE_MD_SINGLE_CONV - (0x0001 << 13): Single conversion mode
    The oscillator requires 1 ms to power up and settle. The ADC then performs the conversion, which takes a time of 2/fADC. The conversion result is placed in the data register, RDY goes low, and the ADC returns to power-down mode.
    AD7792_MODE_MD_IDLE - (0x0002 << 13): Idle mode
    In idle mode, the ADC filter and modulator are held in a reset state, although the modulator clocks are still provided.
    AD7792_MODE_MD_POWER_DOWN - (0x0003 << 13): Power-down mode
    In power-down mode, all the circuitry is powered down, including the current sources, burnout currents, bias voltage generator, and CLKOUT circuitry.
    AD7792_MODE_MD_INT_ZS_CALIB - (0x0004 << 13): Internal zero-scale calibration
    AD7792_MODE_MD_INT_FS_CALIB - (0x0005 << 13): Internal full-scale calibration
    AD7792_MODE_MD_SYS_ZS_CALIB - (0x0006 << 13): System zero-scale calibration
    AD7792_MODE_MD_SYS_FS_CALIB - (0x0007 << 13): System full-scale calibration
    AD7792_MODE_MD_MSK - (0x0007 << 13): Operating mode bit mask
    AD7792_MODE_CLK_x:

    Clock source (Mode Register, bit 6-7 )

    AD7792_MODE_CLK_INT_CLK - (0x0000 << 6): Internal 64 kHz Clock. Internal clock is not available at the CLK pin. (default)
    AD7792_MODE_CLK_INT_CLK_OUT - (0x0001 << 6): Internal 64 kHz Clock. This clock is made available at the CLK pin.
    AD7792_MODE_CLK_EXT_CLK - (0x0002 << 6): External 64 kHz Clock Used. An external clock gives better 50 Hz/60 Hz rejection.
    AD7792_MODE_CLK_EXT_CLK_2 - (0x0003 << 6): External Clock Used. The external clock is divided by 2 within the AD7792/AD7793.
    AD7792_MODE_CLK_MSK - (0x0003 << 6): Clock source bit mask
    AD7792_MODE_FS_x:

    Filter Update Rate (Mode Register, bit 0-3 )

    fADC [Hz] | t Settle [ms] | Rejection @ 50 Hz/60 Hz (Internal Clock)
    AD7792_MODE_FS_FILTER_X - (0x0000): x | x |
    AD7792_MODE_FS_FILTER_4 - (0x0001): 470 | 4 |
    AD7792_MODE_FS_FILTER_8 - (0x0002): 242 | 8 |
    AD7792_MODE_FS_FILTER_16 - (0x0003): 123 | 16 |
    AD7792_MODE_FS_FILTER_32 - (0x0004): 62 | 32 |
    AD7792_MODE_FS_FILTER_40 - (0x0005): 50 | 40 |
    AD7792_MODE_FS_FILTER_48 - (0x0006): 39 | 48 |
    AD7792_MODE_FS_FILTER_60 - (0x0007): 33.2 | 60 |
    AD7792_MODE_FS_FILTER_101 - (0x0008): 19.6 | 101 | 90 dB (60 Hz only)
    AD7792_MODE_FS_FILTER_120_80 - (0x0009): 16.7 | 120 | 80 dB (50 Hz only)
    AD7792_MODE_FS_FILTER_120_65 - (0x000A): 16.7 | 120 | 65 dB (50 Hz and 60 Hz) (default)
    AD7792_MODE_FS_FILTER_160 - (0x000B): 12.5 | 160 | 66 dB (50 Hz and 60 Hz)
    AD7792_MODE_FS_FILTER_200 - (0x000C): 10 | 200 | 69 dB (50 Hz and 60 Hz)
    AD7792_MODE_FS_FILTER_240 - (0x000D): 8.33 | 240 | 70 dB (50 Hz and 60 Hz)
    AD7792_MODE_FS_FILTER_320 - (0x000E): 6.25 | 320 | 72 dB (50 Hz and 60 Hz)
    AD7792_MODE_FS_FILTER_480 - (0x000F): 4.17 | 480 | 74 dB (50 Hz and 60 Hz)
    AD7792_MODE_FS_FILTER_MSK - (0x000F): Filter Update Rate bit mask
    AD7792_CFG_x:

    Configuration Register configuration bits ( unipolar or bipolar mode, enable or disable the buffer, enable or disable the burnout currents, select the gain, and select the analog input channel)

    AD7792_CFG_VBIAS_x - bit 14-15: Bias Voltage Generator Enable.
    The negative terminal of the analog inputs can be biased up to AVDD/2. These bitsare used in conjunction with the AD7792_CFG_BOOST bit.
    AD7792_CFG_BO - bit13: Burnout Current Enable Bit.
    0 - The burnout currents are disabled
    1 - The 100 nA current sources in the signal path are enabled
    The burnout currents can be enabled only when the buffer or in-amp is active.
    AD7792_CFG_UB - bit12: Unipolar/Bipolar Bit
    0 - Enable bipolar coding
  • Zero differential input results in 0x000000 output
  • Full-scale differential input results in 0xFFFFFF output
  • 1 - Enable unipolar coding
  • Negative full-scale differential input results in 0x000000 output
  • Zero differential input results in 0x800000 output
  • Positive full-scale differential input results in 0xFFFFFF output
  • AD7792_CFG_BOOST - bit: Boost mode of the bias voltage generator enable bit
    0 - The current consumed by the bias voltage generator corresponds to the standard value (Boost mode disabled).
    1 - The current consumed by the bias voltage generator is increased.
    This bit is used in conjunction with the VBIAS1 and VBIAS0 bits.
    AD7792_CFG_GAIN_x - bit 8-10: Gain Select Bits
    AD7792_CFG_REFSEL - bit7: Select the reference source for the ADC
    0 - External Reference Applied between REFIN(+) and REFIN(–)
    1 - Internal Reference Selected
    AD7792_CFG_CON5_CON6_MSK - bit 5-6: Must be 0 for correct operation (i.e. do not use).
    AD7792_CFG_BUF - bit4: Configures the ADC for buffered or unbuffered mode
    0 - The ADC operates in unbuffered mode, lowering the power consumption of the device
    1 - The ADC operates in buffered mode, allowing the user to place source impedances on the front end without contributing gain errors to the system.
    The buffer can be disabled when the gain equals 1 or 2. For higher gains, the buffer is automatically enabled.
    With the buffer disabled, the voltage on the analog input pins can be from 30 mV below GND to 30 mV above AVDD. When the buffer is enabled, it requires some headroom, so the voltage on any input pin must be limited to 100 mV within the power supply rails.
    AD7792_CFG_CON3 - bit3: Must be 0 for correct operation (i.e. do not use).
    AD7792_CFG_CH_x - bit 0-2: Select the active analog input channel to the ADC (see AD7792_STATUS_CH_x)
    AD7792_CFG_VBIAS_x:

    Bias Voltage Generator Enable (Configuration Register, bit 14-15)

    AD7792_CFG_VBIAS_NO_BIAS - (0x0000 << 14): Bias voltage generator disabled
    AD7792_CFG_VBIAS_AIN1 - (0x0001 << 14): Bias voltage connected to AIN1(−)
    AD7792_CFG_VBIAS_AIN2 - (0x0002 << 14): Bias voltage connected to AIN2(−)
    AD7792_CFG_GAIN_x:

    Gain Select Bits (Configuration Register, bit 8-10)

    Gain | ADC Input Range (2.5 V Reference)
    AD7792_CFG_GAIN_1 - (0x0000): 1 (In-amp not used) | 2.5 V
    AD7792_CFG_GAIN_2 - (0x0100): 2 (In-amp not used) | 1.25 V
    AD7792_CFG_GAIN_4 - (0x0200): 4 | 625 mV
    AD7792_CFG_GAIN_8 - (0x0300): 8 | 312.5 mV
    AD7792_CFG_GAIN_16 - (0x0400): 16 | 156.2 mV
    AD7792_CFG_GAIN_32 - (0x0500): 32 | 78.125 mV
    AD7792_CFG_GAIN_64 - (0x0600): 64 | 39.06 mV
    AD7792_CFG_GAIN_128 - (0x0700): 128 | 19.53 mV
    AD7792_IO_x:

    IO Register configuration bits (enable and select the value of the excitation currents)

    AD7792_IO_IO7_IO4_MSK - bit 4-7: Must be 0 for correct operation (i.e. do not use).
    AD7792_IO_IEXCDIR_x - bit 2-3: Current Source Direction
    AD7792_IO_IEXCEN_x - bit 0-1: Current Source Value
    AD7792_IO_IEXCDIR_x:

    Current Source Direction (IO Register, bit 2-3)

    AD7792_IO_IEXCDIR_NORMAL - (0x00 << 2): Current Source IEXC1 connected to Pin IOUT1, Current Source IEXC2 connected to Pin IOUT2.
    AD7792_IO_IEXCDIR_INVERTED - (0x01 << 2): Current Source IEXC1 connected to Pin IOUT2, Current Source IEXC2 connected to Pin IOUT1.
    AD7792_IO_IEXCDIR_BOTH_IOUT1 - (0x02 << 2): Both current sources connected to Pin IOUT1.
    Permitted when the current sources are set to 10 μA or 210 μA only.
    AD7792_IO_IEXCDIR_BOTH_IOUT2 - (0x03 << 2): Both current sources connected to Pin IOUT2.
    Permitted when the current sources are set to 10 μA or 210 μA only.
    AD7792_IO_IEXCEN_x:

    Current Source Value (IO Register, bit 0-1)

    AD7792_IO_IEXCEN_OFF - (0x00): Excitation Current Disabled.
    AD7792_IO_IEXCEN_10uA - (0x01): 10 μA
    AD7792_IO_IEXCEN_210uA - (0x02): 210 μA
    AD7792_IO_IEXCEN_1mA - (0x03): 1 mA
    AD7792_Read(handle[TAD7792_Handle], iAddress, &iData)

    Reads register of AD7792

    Use this function to read unsigned 8-Bit, or unsigned 16-Bit registers of the AD7792. The read data is unpacked according to the data type in the register information variable.
    handle : TAD7792_Handle - Device handle of a specific AD7792 (Initialized by AD7792_Init() )
    iAddress : s32 - Register information contains address and data type (use AD7792_REG_x)
    iData : s32 - Variable for storing the data read from the AD7792
    returns : s32
    OK - if successful
    ERROR - The data type contained in iAddress is invalid
    < OK - if another error occurs
    AD7792_Write(handle[TAD7792_Handle], iAddress, iValue)

    Writes register of AD7792

    Use this function to write unsigned 8-Bit or unsigned 16-Bit registers of the AD7792. The data to be written is packed according to the data type in the register information variable and sent to the AD7792.
    handle : TAD7792_Handle - Device handle of a specific AD7792 (Initialized by AD7792_Init() )
    iAddress : s32 - Register information contains address and data type (use AD7792_REG_x)
    iValue : s32 - Data to be packed and written to the AD7792
    returns : s32
    OK - if successful
    ERROR - The data type contained in iAddress is invalid
    < OK - if another error occurs

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    AD7792/AD7793 - 3-Channel, 16-/24-Bit ∑-Δ ADC